Fpga / Asic Design Engineer

ASIC/FPGA Engineer (Portsmouth or Stevenage)

Overview:

Our client is a world leader in the design and manufacture of satellite systems; with business activities covering civil and military telecommunications and Earth observation, science and navigation programmes – together with a complete range of associated ground infrastructure and space equipment. On their behalf, we are currently looking to recruit an experienced ASIC/FPGA Engineer.

Responsibilities:

The successful candidate will be responsible for the design and delivery of complex ASIC and FPGA designs to satisfy the projects requirements.

* ·Agree a requirement specification with Systems Design team that can be delivered and validated to meet the project schedule.
* ·Estimate the effort required to complete the design.
* ·Delivery of the design to cost, schedule and quality.
* ·Requirements definition
* ·Decomposing the requirement specification into an architecture design and document the chosen design whilst describing any trade-offs performed.
* ·Verification of the RTL design and documenting the verification that was performed.
* ·Gate level implementation of the design including Synthesis and Static Timing Analysis.
* ·Performing a Single Event Effects analysis of the design.
* ·System architectural design
* ·Laboratory demonstrator development
* ·Algorithm design and simulation
* ·Digital hardware design and simulation
* ·Performing a Single Event Effects analysis of the design.
* ·Production test vector generation for ASIC design.
* ·Support integration of the ASIC / FPGA into the target hardware.
* ·Ensure that all ASIC and FPGA designs are developed in accordance with the company design process.
* ·Support customer design reviews.

Requirements:

* ·Educated to degree level in relevant discipline.
* ·Experienced in the complete design flow from requirements to design acceptance.
* ·Knowledge of current FPGA technologies (ideally those suitable for Space)
* ·FPGA vendor tools including: Xilinx ISE and Microsemi Libero.
* ·VHDL simulation tools in particular Mentor Graphics Questa.
* ·Experienced in synthesis and STA tools, ideally those from Synopsys.
* ·Experienced in ASIC production vector tools ideally those from Mentor Graphics.
* ·Knowledge of scripting languages including TCL and PERL.
* ·Experience of the Linux operating system would be beneficial.
* ·Proven track record of delivering on cost, on schedule and on quality.
* ·Good analytical skills and methodical approach to problem resolution and investigations.
* ·Good communication skills and able to thrive in a team environment.
* ·Ability to present technical data in a clear and concise manner.
* ·Understanding of digital signal processors would be beneficial.